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Single-Supply, Rail-to-Rail Low Power FET-Input Op Amp AD822
FEATURES
True single-supply operation Output swings rail-to-rail Input voltage range extends below ground Single-supply capability from 3 V to 36 V Dual-supply capability from 1.5 V to 18 V High load drive Capacitive load drive of 350 pF, G = +1 Minimum output current of 15 mA Excellent ac performance for low power 800 A maximum quiescent current per amplifier Unity gain bandwidth: 1.8 MHz Slew rate of 3.0 V/s Good dc performance 800 V maximum input offset voltage 2 V/C typical offset voltage drift 25 pA maximum input bias current Low noise 13 nV/Hz @ 10 kHz No phase inversion
CONNECTION DIAGRAM
OUT1 1 -IN1 2 +IN1 3 V- 4 8 V+ 7 OUT2 6 -IN2
AD822
5 +IN2
Figure 1. 8-Lead PDIP (N Suffix); 8-Lead MSOP (RM Suffix); and 8-Lead SOIC (R Suffix)
GENERAL DESCRIPTION
The AD822 is a dual precision, low power FET input op amp that can operate from a single supply of 3.0 V to 36 V or dual supplies of 1.5 V to 18 V. It has true single-supply capability with an input voltage range extending below the negative rail, allowing the AD822 to accommodate input signals below ground in the single-supply mode. Output voltage swing extends to within 10 mV of each rail, providing the maximum output dynamic range.
100
Battery-powered precision instrumentation Photodiode preamps Active filters 12-bit to 14-bit data acquisition systems Medical instrumentation Low power references and regulators
INPUT VOLTAGE NOISE (nV/Hz)
APPLICATIONS
10
100 1k FREQUENCY (Hz)
10k
Figure 2. Input Voltage Noise vs. Frequency
Offset voltage of 800 V maximum, offset voltage drift of 2 V/C, input bias currents below 25 pA, and low input voltage noise provide dc precision with source impedances up to a gigaohm. The 1.8 MHz unity gain bandwidth, -93 dB THD at 10 kHz, and 3 V/s slew rate are provided with a low supply current of 800 A per amplifier. (continued on Page 3)
Rev. G
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2006 Analog Devices, Inc. All rights reserved.
00874-002
1 10
00874-001
AD822
TABLE OF CONTENTS
Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 4 Absolute Maximum Ratings.......................................................... 12 Maximum Power Dissipation ................................................... 12 ESD Caution................................................................................ 12 Typical Performance Characteristics ........................................... 13 Application Notes ........................................................................... 20 Input Characteristics.................................................................. 20 Output Characteristics............................................................... 20 Applications..................................................................................... 22 Single-Supply Voltage-to-Frequency Converter .................... 22 Single-Supply Programmable Gain Instrumentation Amplifier ..................................................................................... 22 3 V, Single-Supply Stereo Headphone Driver ......................... 23 Low Dropout Bipolar Bridge Driver........................................ 23 Outline Dimensions ....................................................................... 24 Ordering Guide............................................................................... 25
REVISION HISTORY
6/06--Rev. F to Rev. G Changes to Features.......................................................................... 1 Changes to Table 4.......................................................................... 10 Changes to Table 5.......................................................................... 12 Changes to Table 6.......................................................................... 22 10/05--Rev. E to Rev. F Updated Format..................................................................Universal Changes to Outline Dimensions................................................... 24 Updated Ordering Guide............................................................... 24 1/03--Data sheet changed from Rev. D to Rev. E Edits to Specifications ...................................................................... 2 Edits to Figure 10............................................................................ 16 Updated Outline Dimensions ....................................................... 17 10/02--Data sheet changed from Rev. C to Rev. D Edits to Features................................................................................ 1
Edits to Ordering Guide ...................................................................6 Updated SOIC Package Outline ................................................... 17
8/02--Data sheet changed from Rev. B to Rev. C All Figures Updated ................................................................Global Edits to Features.................................................................................1 Updated All Package Outlines ...................................................... 17 7/01--Data sheet changed from Rev. A to Rev. B All Figures Updated ................................................................Global CERDIP References Removed.......................................1, 6, and 18 Additions to Product Description...................................................1 8-Lead SOIC and 8-Lead MSOP Diagrams Added ......................1 Deletion of AD822S Column...........................................................2 Edits to Absolute Maximum Ratings and Ordering Guide .........6 Removed Metalization Photograph ................................................6
Rev. G | Page 2 of 28
AD822
GENERAL DESCRIPTION
(continued from Page 1) The AD822 drives up to 350 pF of direct capacitive load as a follower and provides a minimum output current of 15 mA. This allows the amplifier to handle a wide range of load conditions. Its combination of ac and dc performance, plus the outstanding load drive capability, results in an exceptionally versatile amplifier for the single-supply user. The AD822 is available in two performance grades. The A grade and B grade are rated over the industrial temperature range of -40C to +85C. The AD822 is offered in three varieties of 8-lead packages: PDIP, MSOP, and SOIC.
1V
100
1V
20s
.... .... .... .... .... .... .... .... .... .... .
5V
90
VOUT
10
Figure 3. Gain-of-2 Amplifier; VS = 5, 0, VIN = 2.5 V Sine Centered at 1.25 V, RL = 100
Rev. G | Page 3 of 28
00874-003
0V (GND)
0%
.... .... .... .... .... .... .... .... .... .... 1V
AD822 SPECIFICATIONS
VS = 0, 5 V @ TA = 25C, VCM = 0 V, VOUT = 0.2 V, unless otherwise noted. Table 1.
Parameter DC PERFORMANCE Initial Offset Maximum Offset Over Temperature Offset Drift Input Bias Current at TMAX Input Offset Current at TMAX Open-Loop Gain TMIN to TMAX RL = 10 k TMIN to TMAX RL = 1 k TMIN to TMAX NOISE/HARMONIC PERFORMANCE Input Voltage Noise 0.1 Hz to 10 Hz f = 10 Hz f = 100 Hz f = 1 kHz f = 10 kHz Input Current Noise 0.1 Hz to 10 Hz f = 1 kHz Harmonic Distortion f = 10 kHz DYNAMIC PERFORMANCE Unity Gain Frequency Full Power Response Slew Rate Settling Time to 0.1% to 0.01% MATCHING CHARACTERISTICS Initial Offset Maximum Offset Over Temperature Offset Drift Input Bias Current Crosstalk @ f = 1 kHz f = 100 kHz INPUT CHARACTERISTICS Input Voltage Range 1 TMIN to TMAX Common-Mode Rejection Ratio (CMRR) TMIN to TMAX Conditions Min AD822 A Grade Typ Max 0.1 0.5 2 2 0.5 2 0.5 500 400 80 80 15 10 1000 150 30 0.8 1.2 25 5 20 Min AD822 B Grade Typ Max 0.1 0.5 2 2 0.5 2 0.5 500 400 80 80 15 10 1000 150 30 0.4 0.9 10 2.5 10 Unit mV mV V/C pA nA pA nA V/mV V/mV V/mV V/mV V/mV V/mV
VCM = 0 V to 4 V
VO = 0.2 V to 4 V RL = 100 k
2 25 21 16 13 18 0.8 RL = 10 k to 2.5 V VO = 0.25 V to 4.75 V -93 1.8 210 3 1.4 1.8 1.0 1.6 3 20 RL = 5 k -130 -93 -0.2 -0.2 66 66 +4 +4 80 -0.2 -0.2 69 66
2 25 21 16 13 18 0.8 -93 1.8 210 3 1.4 1.8 0.5 1.3 3 10 -130 -93 +4 +4 80
V p-p nV/Hz nV/Hz nV/Hz nV/Hz fA p-p fA/Hz dB MHz kHz V/s s s mV mV V/C pA dB dB V V dB dB
VO p-p = 4.5 V
VO = 0.2 V to 4.5 V
VCM = 0 V to 2 V VCM = 0 V to 2 V
Rev. G | Page 4 of 28
AD822
Parameter Input Impedance Differential Common Mode OUTPUT CHARACTERISTICS Output Saturation Voltage 2 VOL - VEE TMIN to TMAX VCC - VOH TMIN to TMAX VOL - VEE TMIN to TMAX VCC - VOH TMIN to TMAX VOL - VEE TMIN to TMAX VCC - VOH TMIN to TMAX Operating Output Current TMIN to TMAX Capacitive Load Drive POWER SUPPLY Quiescent Current TMIN to TMAX Power Supply Rejection TMIN to TMAX
1
Conditions
Min
AD822 A Grade Typ Max 1013||0.5 1013||2.8
Min
AD822 B Grade Typ Max 1013||0.5 1013||2.8
Unit ||pF ||pF
ISINK = 20 A ISOURCE = 20 A ISINK = 2 mA ISOURCE = 2 mA ISINK = 15 mA ISOURCE = 15 mA 15 12
5 10 40 80 300 800
7 10 14 20 55 80 110 160 500 1000 1500 1900 15 12
5 10 40 80 300 800
7 10 14 20 55 80 110 160 500 1000 1500 1900
350 1.24 80 1.6 70 70
350 1.24 80 1.6
mV mV mV mV mV mV mV mV mV mV mV mV mA mA pF mA dB dB
VS+ = 5 V to 15 V
66 66
2
This is a functional specification. Amplifier bandwidth decreases when the input common-mode voltage is driven in the range (+VS - 1 V) to +VS. Common-mode effort voltage is typically less than 5 mV with the common-mode voltage set at 1 V below the positive supply. VOL - VEE is defined as the difference between the lowest possible output voltage (VOL) and the negative voltage supply rail (VEE). VCC - VOH is defined as the difference between the highest possible output voltage (VOH) and the positive supply voltage (VCC).
Rev. G | Page 5 of 28
AD822
VS = 5 V @ TA = 25C, VCM = 0 V, VOUT = 0 V, unless otherwise noted. Table 2.
Parameter DC PERFORMANCE Initial Offset Maximum Offset Over Temperature Offset Drift Input Bias Current at TMAX Input Offset Current at TMAX Open-Loop Gain TMIN to TMAX RL = 10 k TMIN to TMAX RL = 1 k TMIN to TMAX NOISE/HARMONIC PERFORMANCE Input Voltage Noise 0.1 Hz to 10 Hz f = 10 Hz f = 100 Hz f = 1 kHz f = 10 kHz Input Current Noise 0.1 Hz to 10 Hz f = 1 kHz Harmonic Distortion f = 10 kHz DYNAMIC PERFORMANCE Unity Gain Frequency Full Power Response Slew Rate Settling Time to 0.1% to 0.01% MATCHING CHARACTERISTICS Initial Offset Maximum Offset Over Temperature Offset Drift Input Bias Current Crosstalk @ f = 1 kHz f = 100 kHz INPUT CHARACTERISTICS Input Voltage Range 1 TMIN to TMAX Common-Mode Rejection Ratio (CMRR) TMIN to TMAX Input Impedance Differential Common Mode Conditions Min AD822 A Grade Typ Max 0.1 0.5 2 2 0.5 2 0.5 400 400 80 80 20 10 1000 150 30 0.8 1.5 25 5 20 Min AD822 B Grade Typ Max 0.1 0.5 2 2 0.5 2 0.5 400 400 80 80 20 10 1000 150 30 0.4 1 10 2.5 10 Unit mV mV V/C pA nA pA nA V/mV V/mV V/mV V/mV V/mV V/mV
VCM = -5 V to +4 V
VO = -4 V to +4 V RL = 100 k
2 25 21 16 13 18 0.8 RL = 10 k VO = 4.5 V -93 1.9 105 3 1.4 1.8 1.0 3 3 25 RL = 5 k -130 -93 -5.2 -5.2 66 66 +4 +4 80 -5.2 -5.2 69 66
2 25 21 16 13 18 0.8 -93 1.9 105 3 1.4 1.8 0.5 2 3 10 -130 -93 +4 +4 80
V p-p nV/Hz nV/Hz nV/Hz nV/Hz fA p-p fA/Hz dB MHz kHz V/s s s mV mV V/C pA dB dB V V dB dB ||pF ||pF
VO p-p = 9 V
VO = 0 V to 4.5 V
VCM = -5 V to +2 V VCM = -5 V to +2 V
1013||0.5 1013||2.8
Rev. G | Page 6 of 28
1013||0.5 1013||2.8
AD822
Parameter OUTPUT CHARACTERISTICS Output Saturation Voltage 2 VOL - VEE TMIN to TMAX VCC - VOH TMIN to TMAX VOL - VEE TMIN to TMAX VCC - VOH TMIN to TMAX VOL - VEE TMIN to TMAX VCC - VOH TMIN to TMAX Operating Output Current TMIN to TMAX Capacitive Load Drive POWER SUPPLY Quiescent Current TMIN to TMAX Power Supply Rejection TMIN to TMAX
1
Conditions
Min
AD822 A Grade Typ Max
Min
AD822 B Grade Typ Max
Unit
ISINK = 20 A ISOURCE = 20 A ISINK = 2 mA ISOURCE = 2 mA ISINK = 15 mA ISOURCE = 15 mA 15 12
5 10 40 80 300 800
7 10 14 20 55 80 110 160 500 1000 1500 1900 15 12
5 10 40 80 300 800
7 10 14 20 55 80 110 160 500 1000 1500 1900
350 1.3 80 1.6 70 70
350 1.3 80 1.6
mV mV mV mV mV mV mV mV mV mV mV mV mA mA pF mA dB dB
VS+ = 5 V to 15 V
66 66
2
This is a functional specification. Amplifier bandwidth decreases when the input common-mode voltage is driven in the range (+VS - 1 V) to +VS. Common-mode effort voltage is typically less than 5 mV with the common-mode voltage set at 1 V below the positive supply. VOL - VEE is defined as the difference between the lowest possible output voltage (VOL) and the negative voltage supply rail (VEE). VCC - VOH is defined as the difference between the highest possible output voltage (VOH) and the positive supply voltage (VCC).
Rev. G | Page 7 of 28
AD822
VS = 15 V @ TA = 25C, VCM = 0 V, VOUT = 0 V, unless otherwise noted. Table 3.
Parameter DC PERFORMANCE Initial Offset Maximum Offset Over Temperature Offset Drift Input Bias Current at TMAX Input Offset Current at TMAX Open-Loop Gain TMIN to TMAX RL = 10 k TMIN to TMAX RL = 1 k TMIN to TMAX NOISE/HARMONIC PERFORMANCE Input Voltage Noise 0.1 Hz to 10 Hz f = 10 Hz f = 100 Hz f = 1 kHz f = 10 kHz Input Current Noise 0.1 Hz to 10 Hz f = 1 kHz Harmonic Distortion f = 10 kHz DYNAMIC PERFORMANCE Unity Gain Frequency Full Power Response Slew Rate Settling Time to 0.1% to 0.01% MATCHING CHARACTERISTICS Initial Offset Maximum Offset Over Temperature Offset Drift Input Bias Current Crosstalk @ f = 1 kHz f = 100 kHz INPUT CHARACTERISTICS Input Voltage Range 1 TMIN to TMAX Common-Mode Rejection Ratio (CMRR) TMIN to TMAX Conditions Min AD822 A Grade Typ Max 0.4 0.5 2 2 40 0.5 2 0.5 500 500 100 100 30 20 2000 500 45 2 3 25 5 20 Min AD822 B Grade Typ Max 0.3 0.5 2 2 40 0.5 2 0.5 500 500 100 100 30 20 2000 500 45 1.5 2.5 12 2.5 12 Unit mV mV V/C pA pA nA pA nA V/mV V/mV V/mV V/mV V/mV V/mV
VCM = 0 V VCM = -10 V VCM = 0 V
VO = +10 V to -10 V RL = 100 k
2 25 21 16 13 18 0.8 RL = 10 k VO = 10 V -85 1.9 45 3 4.1 4.5 3 4 3 25 RL = 5 k -130 -93 -15.2 -15.2 70 70 +14 +14 80 -15.2 -15.2 74 74
2 25 21 16 13 18 0.8 -85 1.9 45 3 4.1 4.5 2 2.5 3 12 -130 -93 +4 +4 90
V p-p nV/Hz nV/Hz nV/Hz nV/Hz fA p-p fA/Hz dB MHz kHz V/s s s mV mV V/C pA dB dB V V dB dB
VO p-p = 20 V
VO = 0 V to 10 V
VCM = -15 V to +12 V VCM = -15 V to +12 V
Rev. G | Page 8 of 28
AD822
Parameter Input Impedance Differential Common Mode OUTPUT CHARACTERISTICS Output Saturation Voltage 2 VOL - VEE TMIN to TMAX VCC - VOH TMIN to TMAX VOL - VEE TMIN to TMAX VCC - VOH TMIN to TMAX VOL - VEE TMIN to TMAX VCC - VOH TMIN to TMAX Operating Output Current TMIN to TMAX Capacitive Load Drive POWER SUPPLY Quiescent Current TMIN to TMAX Power Supply Rejection TMIN to TMAX
1
Conditions
Min
AD822 A Grade Typ Max 1013||0.5 1013||2.8
Min
AD822 B Grade Typ Max 1013||0.5 1013||2.8
Unit ||pF ||pF
ISINK = 20 A ISOURCE = 20 A ISINK = 2 mA ISOURCE = 2 mA ISINK = 15 mA ISOURCE = 15 mA 20 15
5 10 40 80 300 800
7 10 14 20 55 80 110 160 500 1000 1500 1900 20 15
5 10 40 80 300 800
7 10 14 20 55 80 110 160 500 1000 1500 1900
350 1.4 80 1.8 70 70
350 1.4 80 1.8
mV mV mV mV mV mV mV mV mV mV mV mV mA mA pF mA dB dB
VS+ = 5 V to 15 V
70 70
2
This is a functional specification. Amplifier bandwidth decreases when the input common-mode voltage is driven in the range (+VS - 1 V) to +VS. Common-mode effort voltage is typically less than 5 mV with the common-mode voltage set at 1 V below the positive supply. VOL - VEE is defined as the difference between the lowest possible output voltage (VOL) and the negative voltage supply rail (VEE). VCC - VOH is defined as the difference between the highest possible output voltage (VOH) and the positive supply voltage (VCC).
Rev. G | Page 9 of 28
AD822
VS = 0, 3 V @ TA = 25C, VCM = 0 V, VOUT = 0.2 V, unless otherwise noted. Table 4.
Parameter DC PERFORMANCE Initial Offset Maximum Offset Over Temperature Offset Drift Input Bias Current at TMAX Input Offset Current at TMAX Open-Loop Gain TMIN to TMAX TMIN to TMAX TMIN to TMAX NOISE/HARMONIC PERFORMANCE Input Voltage Noise 0.1 Hz to 10 Hz f = 10 Hz f = 100 Hz f = 1 kHz f = 10 kHz Input Current Noise 0.1 Hz to 10 Hz f = 1 kHz Harmonic Distortion f = 10 kHz DYNAMIC PERFORMANCE Unity Gain Frequency Full Power Response Slew Rate Settling Time to 0.1% to 0.01% MATCHING CHARACTERISTICS Offset Drift Crosstalk @ f = 1 kHz f = 100 kHz INPUT CHARACTERISTICS Common-Mode Rejection Ratio (CMRR) TMIN to TMAX Input Impedance Differential Common Mode Conditions Typ 0.2 0.5 1 2 0.5 2 0.5 1000 150 30 Unit mV mV V/C pA nA pA nA V/mV V/mV V/mV
VCM = 0 V to 2 V
VO = 0.2 V to 2 V RL = 100 k RL = 10 k RL = 1 k
2 25 21 16 13 18 0.8 RL = 10 k to 1.5 V VO = 1.25 V -92 1.5 240 3 1 1.4 2 -130 -93 74
V p-p nV/Hz nV/Hz nV/Hz nV/Hz fA p-p fA/Hz dB MHz kHz V/s s s V/C dB dB dB
VO p-p = 2.5 V
VO = 0.2 V to 2.5 V
RL = 5 k
VCM = 0 V to 1 V
1013||0.5 1013||2.8
||pF ||pF
Rev. G | Page 10 of 28
AD822
Parameter OUTPUT CHARACTERISTICS Output Saturation Voltage 1 VOL - VEE VCC - VOH VOL - VEE VCC - VOH VOL - VEE VCC - VOH Capacitive Load Drive POWER SUPPLY Quiescent Current TMIN to TMAX Power Supply Rejection TMIN to TMAX
1
Conditions
Typ
Unit
ISINK = 20 A ISOURCE = 20 A ISINK = 2 mA ISOURCE = 2 mA ISINK = 10 mA ISOURCE = 10 mA
5 10 40 80 200 500 350 1.24
mV mV mV mV mV mV pF mA dB
VS+ = 3 V to 15 V
80
VOL - VEE is defined as the difference between the lowest possible output voltage (VOL) and the negative voltage supply rail (VEE). VCC - VOH is defined as the difference between the highest possible output voltage (VOH) and the positive supply voltage (VCC). Specifications are TMIN to TMAX.
Rev. G | Page 11 of 28
AD822 ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter Supply Voltage Internal Power Dissipation1 PDIP (N) SOIC (R) Input Voltage Output Short Circuit Duration Differential Input Voltage Storage Temperature Range (N) Storage Temperature Range (R, RM) Operating Temperature Range AD822 A Grade and B Grade Lead Temperature Range (Soldering, 60 sec)
1
Rating 18 V Observe derating curves Observe derating curves (+VS + 0.2 V) to -(20 V + VS) Indefinite 30 V -65C to +125C -65C to +150C -40C to +85C 260C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by the AD822 is limited by the associated rise in junction temperature. For plastic packages, the maximum safe junction temperature is 145C. If these maximums are exceeded momentarily, proper circuit operation is restored as soon as the die temperature is reduced. Leaving the device in the overheated condition for an extended period can result in device burnout. To ensure proper operation, it is important to observe the derating curves shown in Figure 27. While the AD822 is internally short-circuit protected, this may not be sufficient to guarantee that the maximum junction temperature is not exceeded under all conditions. With power supplies 12 V (or less) at an ambient temperature of 25C or less, if the output node is shorted to a supply rail, then the amplifier is not destroyed, even if this condition persists for an extended period.
8-lead PDIP package: JA = 90C/W. 8-lead SOIC package: JA = 160C/W. 8-lead MSOP package: JA = 190C/W.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. G | Page 12 of 28
AD822 TYPICAL PERFORMANCE CHARACTERISTICS
70 60 50 40 30 20 10 0 -0.5
VS = 0V, 5V
5
INPUT BIAS CURRENT (pA)
NUMBER OF UNITS
0 VS = 0V, +5V AND 5V VS = 5V
-0.4
-0.3
-0.2
0.1 0.2 OFFSET VOLTAGE (mV)
-0.1
0
00874-004
0.3
0.4
0.5
-4
-3
-2 -1 0 1 2 COMMON-MODE VOLTAGE (V)
3
4
5
Figure 4. Typical Distribution of Offset Voltage (390 Units)
16 14 12 10
% IN BIN
Figure 7. Input Bias Current vs. Common-Mode Voltage; VS = 5 V, 0 V, and VS = 5 V
1k
VS = 5V VS = 15V
INPUT BIAS CURRENT (pA)
100
8 6 4 2
00874-005
10
1
-8
-6 -4 -2 0 2 4 6 OFFSET VOLTAGE DRIFT (V/C)
8
10
-12
-8 -4 0 4 8 COMMON-MODE VOLTAGE (V)
12
16
Figure 5. Typical Distribution of Offset Voltage Drift (100 Units)
50 45 40
NUMBER OF UNITS
Figure 8. Input Bias Current vs. Common-Mode Voltage; VS = 15 V
100k
10k
35 30 25 20 15 10 5
00874-006
INPUT BIAS CURRENT (pA)
1k
100
10
1
40
60 80 100 TEMPERATURE (C)
120
140
Figure 6. Typical Distribution of Input Bias Current (213 Units)
Figure 9. Input Bias Current vs. Temperature; VS = 5 V, VCM = 0
Rev. G | Page 13 of 28
00874-009
0
0
1
2
3 4 5 6 7 INPUT BIAS CURRENT (pA)
8
9
10
0.1 20
00874-008
0 -12 -10
0.1 -16
00874-007
-5 -5
AD822
10M
40
OPEN-LOOP GAIN (V/V)
VS = 15V 1M VS = 0V, +5V
20
RL = 20k
RL = 2k
POS RAIL
INPUT VOLTAGE (V)
NEG RAIL 0 POS RAIL
100k
VS = 0V, +3V
POS RAIL
-20 NEG RAIL
RL = 100k
00874-010
1k 10k LOAD RESISTANCE ()
100k
0
60 120 180 240 OUTPUT VOLTAGE FROM SUPPLY RAILS (mV)
300
Figure 10. Open-Loop Gain vs. Load Resistance
10M
Figure 13. Input Effort Voltage with Output Voltage Within 300 mV of Either Supply Rail for Various Resistive Loads; VS = 5 V
1k
OPEN-LOOP GAIN (V/V)
VS = 15V VS = 0V, +5V RL = 10k VS = 15V VS = 0V, +5V
1M
INPUT VOLTAGE NOISE (nV/Hz)
RL = 100k
100
100k RL = 600 VS = 15V
10
VS = 0V, +5V
00874-011
-40
-20
0
20 40 60 80 TEMPERATURE (C)
100
120
140
1
10
100 FREQUENCY (Hz)
1k
10k
Figure 11. Open-Loop Gain vs. Temperature
300
Figure 14. Input Voltage Noise vs. Frequency
-40 -50 -60 RL = 10k ACL = -1
200
INPUT VOLTAGE (V)
100
RL = 10k
THD (dB)
RL = 100k
0
-70 -80 -90
VS = 0V, +3V; VOUT = 2.5V p-p
-100
VS = 15V; VOUT = 20V p-p VS = 5V; VOUT = 9V p-p
RL = 600
-200
-100 VS = 0V, +5V; VOUT = 4.5V p-p
00874-012
-12
-8
-4 0 4 OUTPUT VOLTAGE (V)
8
12
16
1k
10k FREQUENCY (Hz)
100k
Figure 12. Input Error Voltage vs. Output Voltage for Resistive Loads
Figure 15. Total Harmonic Distortion (THD) vs. Frequency
Rev. G | Page 14 of 28
00874-015
-300 -16
-110 100
00874-014
10k -60
1
00874-013
10k 100
-40
NEG RAIL
AD822
100 100
90 80
COMMON-MODE REJECTION (dB)
80
80
PHASE MARGIN (Degrees)
OPEN-LOOP GAIN (dB)
PHASE 60 GAIN 40 40 60
70 60 50 40 30 20 10
VS = 15V
VS = 0V, +3V
VS = 0V, +5V
20 RL = 2k CL = 100pF
20
0
0
00874-016
100
1k
10k 100k FREQUENCY (Hz)
1M
100
1k
10k 100k FREQUENCY (Hz)
1M
10M
Figure 16. Open-Loop Gain and Phase Margin vs. Frequency
1k
5
Figure 19. Common-Mode Rejection vs. Frequency
COMMON-MODE ERROR VOLTAGE (mV)
ACL = +1 VS = 15V
100
OUTPUT IMPEDANCE ()
4
NEGATIVE RAIL
POSITIVE RAIL
10
3 +25C 2 +125C -55C +125C 0 1 2 COMMON-MODE VOLTAGE FROM SUPP LY RAILS (V) 3
00874-020
00874-021
1
0.1
1
-55C
1k
10k 100k FREQUENCY (Hz)
1M
10M
00874-017
0.01 100
0 -1
Figure 17. Output Impedance vs. Frequency
16
Figure 20. Absolute Common-Mode Error vs. Common-Mode Voltage from Supply Rails (VS - VCM)
1000
8 4
1%
OUTPUT SATURATION VOLTAGE (mV)
OUTPUT SWING FROM 0 TO VOLTS
12
100
VS - VOH
0.01% 0 -4 -8 -12
00874-018
0.1% 0.01%
ERROR
10
VOL - VS
1%
-16
0
1
2 3 SETTLING TIME (s)
4
5
0 0.001
0.01
0.1 1 LOAD CURRENT (mA)
10
100
Figure 18. Output Swing and Error vs. Settling Time
Figure 21. Output Saturation Voltage vs. Load Current
Rev. G | Page 15 of 28
00874-019
-20 10
-20 10M
0 10
AD822
1000 I SOURCE = 10mA
100 90
OUTPUT SATURATION VOLTAGE (mV)
POWER SUPPLY REJECTION (dB)
80 70 60 50 40 30 20 10 -PSRR +PSRR
I SINK = 10mA 100 I SOURCE = 1mA I SINK = 1mA 10 I SOURCE = 10A I SINK = 10A
00874-022
-40
-20
0
60 20 40 80 TEMPERATURE (C)
100
120
140
100
1k
10k 100k FREQUENCY (Hz)
1M
10M
Figure 22. Output Saturation Voltage vs. Temperature
80
SHORT CIRCUIT CURRENT LIMIT (mA)
Figure 25. Power Supply Rejection vs. Frequency
30
70 60
VS = 15V
OUTPUT VOLTAGE (V)
25 VS = 15V 20
-OUT
RL = 2k
50
VS = 15V
40
VS = 0V, +5V
15
30 20 10 0 -60
+
VS = 0V, +3V
- -
VS = 0V, +3V
10 VS = 0V, +5V VS = 0V, +3V
VS = 0V, +5V
+ +
5
00874-023
-40
-20
0
20 40 60 80 TEMPERATURE (C)
100
120
140
100k 1M FREQUENCY (Hz)
10M
Figure 23. Short Circuit Current Limit vs. Temperature
1600 T = +125C 1400
Figure 26. Large Signal Frequency Response
2.4 2.2
TOTAL POWER DISSIPATION (W)
T = +25C
2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 8-LEAD MSOP 8-LEAD SOIC
QUIESCENT CURRENT (A)
1200 1000 800 600 400 200
8-LEAD PDIP
T = -55C
00874-024
0
4
8
12 16 20 24 28 TOTAL SUPPLY VOLTAGE (V)
32
36
-40
-20 0 20 40 AMBIENT TEMPERATURE (C)
60
80
Figure 24. Quiescent Current vs. Supply Voltage vs. Temperature
Figure 27. Maximum Power Dissipation vs. Temperature for Packages
Rev. G | Page 16 of 28
00874-027
0
0 -60
00874-026
0 10k
00874-025
1 -60
0 10
AD822
-70
5V
-80
100
5s
-90
CROSSTALK (dB)
90
-100 -110 -120 -130 -140 300
10 0%
00874-032
1k
3k
10k 30k FREQUENCY (Hz)
100k
300k
1M
00874-028
Figure 32. Large Signal Response Unity Gain Follower; VS = 15 V, RL = 10 k
Figure 28. Crosstalk vs. Frequency
+VS 8 VIN
10mV
0.01F
100 90
500ns
+ -
AD822
RL 4 0.01F
1/2
100pF
VOUT
00874-029
Figure 29. Unity Gain Follower
10 0%
00874-033
5V
100 90
10s
Figure 33. Small Signal Response Unity Gain Follower; VS =15 V, RL = 10 k
1V
100 90
2s
10 0%
00874-030
10
VOUT +Vs 20k 0.1F 1F 6 2.2k
Figure 34. VS = 5 V, 0 V; Unity Gain Follower Response to 0 V to 4 V Step
+VS 8 VIN 0.01F
20V p-p
5k
VIN CROSS TALK = 20 log
00874-031
VOUT 10V IN
0.1F -Vs
1F
Figure 35. Unity Gain Follower
Figure 31. Crosstalk Test Circuit
Rev. G | Page 17 of 28
00874-035
+
+
3
AD822
1/2
1
5k
7
AD822
1/2
-
-
2
8
+ -
5
AD822
RL 4
1/2
100pF
VOUT
00874-034
Figure 30. 20 V p-p, 25 kHz Sine Wave Input; Unity Gain Follower; VS = 15 V, RL = 600
GND
0%
AD822
VIN
10k
+VS
20k
VOUT 0.01F
100
10mV
2s
8
90
4
Figure 36. Gain-of-T2 Inverter
GND
00874-036
1V
100 90
2s
Figure 39. VS = 5 V, 0 V; Gain-of-2 Inverter Response to 20 mV Step, Centered 20 mV below Ground, RL = 10 k
1V
100 90
2s
10
GND
0%
00874-037
Figure 37. VS = 5 V, 0 V; Unity Gain Follower Response to 0 V to 5 V Step
10
GND
0%
00874-040
10mV
100 90
2s
Figure 40. VS = 5 V, 0 V; Gain-of-2 Inverter Response to 2.5 V Step, Centered -1.25 V below Ground, RL = 10 k
500mV
100 90
10s
10
GND
0%
00874-038
10
Figure 41. VS = 3 V, 0 V; Gain-of-2 Inverter, VIN = 1.25 V, 25 kHz, Sine Wave Centered at -0.75 V, RL = 600
Rev. G | Page 18 of 28
00874-041
Figure 38. VS = 5 V, 0 V; Unity Gain Follower Response to 40 mV Step, Centered 40 mV above Ground, RL = 10 k
GND
0%
00874-039
+
-
AD822
RL
1/2
100pF
10 0%
AD822
1V
100 90
10s
.... .... .... .... .... .... .... .... .... ....
10
GND
0%
.... .... .... .... .... .... .... .... .... .... 1V
(a)
1V
+Vs
100 90
1V
10s ... .... .... .... ....
.... .... .... .... ...
10
GND
0%
.... .... .... .... .... .... .... .... .... .... 1V
(b)
5V RP VIN VOUT
00874-042
Figure 42. (a) Response with RP = 0; VIN from 0 to +VS (b) VIN = 0 to +VS + 200 mV VOUT = 0 to + VS RP = 49.9 k
Rev. G | Page 19 of 28
AD822 APPLICATION NOTES
INPUT CHARACTERISTICS
In the AD822, n-channel JFETs are used to provide a low offset, low noise, high impedance input stage. Minimum input common-mode voltage extends from 0.2 V below -VS to 1 V less than +VS. Driving the input voltage closer to the positive rail causes a loss of amplifier bandwidth (as can be seen by comparing the large signal responses shown in Figure 34 and Figure 37) and increased common-mode voltage error as illustrated in Figure 20. The AD822 does not exhibit phase reversal for input voltages up to and including +VS. Figure 42 shows the response of an AD822 voltage follower to a 0 V to 5 V (+VS) square wave input. The input and output are superimposed. The output tracks the input up to +VS without phase reversal. The reduced bandwidth above a 4 V input causes the rounding of the output waveform. For input voltages greater than +VS, a resistor in series with the AD822's noninverting input prevents phase reversal, at the expense of greater input voltage noise. This is illustrated in Figure 42. Since the input stage uses n-channel JFETs, input current during normal operation is negative; the current flows out from the input terminals. If the input voltage is driven more positive than +VS - 0.4 V, then the input current reverses direction as internal device junctions become forward biased. This is illustrated in Figure 7. A current limiting resistor should be used in series with the input of the AD822 if there is a possibility of the input voltage exceeding the positive supply by more than 300 mV, or if an input voltage is applied to the AD822 when VS = 0. The amplifier is damaged if left in that condition for more than 10 seconds. A 1 k resistor allows the amplifier to withstand up to 10 V of continuous overvoltage and increases the input voltage noise by a negligible amount. Input voltages less than -VS are a completely different story. The amplifier can safely withstand input voltages 20 V below the negative supply voltage as long as the total voltage from the positive supply to the input terminal is less than 36 V. In addition, the input stage typically maintains picoampere (pA) level input currents across that input voltage range. The AD822 is designed for 13 nV/Hz wideband input voltage noise and maintains low noise performance to low frequencies (refer to Figure 14). This noise performance, along with the AD822's low input current and current noise, means that the AD822 contributes negligible noise for applications with source resistances greater than 10 k and signal bandwidths greater than 1 kHz. This is illustrated in Figure 43.
100k WHENEVER JOHNSON NOISE IS GREATER THAN AMPLIFIER NOISE, AMPLIFIER NOISE CAN BE CONSIDERED NEGLIGIBLE FOR APPLICATION. 1kHz 1k RESISTOR JOHNSON NOISE 100 10k
INPUT VOLTAGE NOISE (V)
10 10Hz 1 AMPLIFIER-GENERATED NOISE 100k 10M 100M 1M SOURCE IMPEDANCE () 1G 10G
00874-043
0.1 10k
Figure 43. Total Noise vs. Source Impedance
OUTPUT CHARACTERISTICS
The AD822's unique bipolar rail-to-rail output stage swings within 5 mV of the negative supply and 10 mV of the positive supply with no external resistive load. The AD822's approximate output saturation resistance is 40 sourcing and 20 sinking. This can be used to estimate output saturation voltage when driving heavier current loads. For instance, when sourcing 5 mA, the saturation voltage to the positive supply rail is 200 mV; when sinking 5 mA, the saturation voltage to the negative rail is 100 mV. The amplifier's open-loop gain characteristic changes as a function of resistive load, as shown in Figure 10 to Figure 13. For load resistances over 20 k, the AD822's input error voltage is virtually unchanged until the output voltage is driven to 180 mV of either supply. If the AD822's output is overdriven so as to saturate either of the output devices, the amplifier recovers within 2 s of its input returning to the amplifier's linear operating region. Direct capacitive loads interact with the amplifier's effective output impedance to form an additional pole in the amplifier's feedback loop, which can cause excessive peaking on the pulse response or loss of stability. Worst case is when the amplifier is used as a unity gain follower. Figure 44 shows the AD822's pulse response as a unity gain follower driving 350 pF. This amount of overshoot indicates approximately 20 of phase margin--the system is stable, but nearing the edge. Configurations with less loop gain, and as a result less loop bandwidth, are much less sensitive to capacitance load effects.
Rev. G | Page 20 of 28
AD822
20mV
100 90
2s
.... .... .... .... .... .... .... .... .... ....
Figure 46 shows a method for extending capacitance load drive capability for a unity gain follower. With these component values, the circuit drives 5000 pF with a 10% overshoot.
+VS 8 VIN 0.01F
+ -
AD822
4 -VS 0.01F
1/2
100
VOUT CL
10 0%
.... .... .... .... .... .... .... .... .... ....
00874-044
Figure 44. Small Signal Response of AD822 as Unity Gain Follower Driving 350 pF
20k
Figure 46. Extending Unity Gain Follower Capacitive Load Capability Beyond 350 pF
Figure 45 is a plot of capacitive load that results in a 20 phase margin vs. noise gain for the AD822. Noise gain is the inverse of the feedback attenuation factor provided by the feedback network in use.
5
4
RF R1
NOISE GAIN 1+
3
2
1 300
1k 3k 10k CAPACITIVE LOAD FOR 20 PHASE MARGIN (pF)
30k
RF R1
CL
00874-045
Figure 45. Capacitive Load Tolerance vs. Noise Gain
Rev. G | Page 21 of 28
00874-046
20pF
AD822 APPLICATIONS
SINGLE-SUPPLY VOLTAGE-TO-FREQUENCY CONVERTER
The circuit shown in Figure 47 uses the AD822 to drive a low power timer that produces a stable pulse of width t1. The positive going output pulse is integrated by R1 - C1 and used as one input to the AD822 that is connected as a differential integrator. The other input (nonloading) is the unknown voltage, VIN. The AD822 output drives the timer trigger input, closing the overall feedback loop.
10V C5 0.1F U4 REF02 VREF = 5V RSCALE ** 10k CMOS 74HCO4 U3B 3 4 0.01F, 2%
Table 6. In-Amp Performance
Parameters CMRR Common-Mode Voltage Range 3 dB BW, G = 10 G = 100 tSETTLING 2 V Step (VS = 0 V, 3 V) 5 V (VS = 5 V) Noise @ f = 1 kHz, G = 10 G = 100 ISUPPLY (Total) VS = 3 V, 0 V 74 dB -0.2 V to +2 V 180 kHz 18 kHz 2 s 270 nV/Hz 2.2 V/Hz 1.10 mA 5 s 270 nV/Hz 2.2 V/Hz 1.15 mA VS = 5 V 80 dB -5.2 V to +4 V 180 kHz 18 kHz
2
6 5
3 4
U3A 2
C3 0.1F 1 U2 CMOS 555 4 6 2 7
R THR
OUT2
OUT1
100 90
5s .... .... .... .... ... ... .... .... .... ....
R2 499k 1% R1 499k 1%
U1
C1
R3* 116k
8
V+
AD822B
-
+ 1/2
OUT CV
3 5
TR DIS GND 1
VIN
Figure 47. Single-Supply Voltage-to-Frequency Converter
00874-047
NOTES 1. fOUT = VIN/(VREF x t1), t1 = 1.1 x R3 x C6. = 25kHz FS AS SHOWN. 2. * = 1% METAL FILM <50ppm/C TC. 3. ** = 10% 20T FILM <100ppm/C TC. 4. t1 = 33F FOR fOUT = 20kHz @ VIN = 2.0V.
Figure 48. Pulse Response of In-Amp to a 500 mV p-p Input Signal; VS = 5 V, 0 V; Gain = 0
R1 90k R2 9k R3 1k R4 1k R5 9k R6 90k OHMTEK PART # 1043
The AD822 can be configured as a single-supply instrumentation amplifier that is able to operate from single supplies down to 3 V or dual supplies up to 15 V. Using only one AD822 rather than three separate op amps, this circuit is cost and power efficient. The AD822 FET inputs' 2 pA bias currents minimize offset errors caused by high unbalanced source impedances. An array of precision thin film resistors sets the in amp gain to be either 10 or 100. These resistors are laser trimmed to ratio match to 0.01% and have a maximum differential TC of 5 ppm/C.
VIN2
RP 1k (G = 10) VOUT = (VIN1 - VIN2) 1+
(G = 100) VOUT = (VIN1 - VIN2) 1+
R5 + R6 R4
+VREF
Figure 49. A Single-Supply Programmable Instrumentation Amplifier
Rev. G | Page 22 of 28
00874-049
( (
R6 R4 + R5
) )
+VREF
-
VIN1
+
+
3
AD822
5
AD822
4
+
RP 1k
1/2
1
-
-
SINGLE-SUPPLY PROGRAMMABLE GAIN INSTRUMENTATION AMPLIFIER
-
Typical AD822 bias currents of 2 pA allow M range source impedances with negligible dc errors. Linearity errors on the order of 0.01% full scale can be achieved with this circuit. This performance is obtained with a 5 V single supply that delivers less than 1 mA to the entire circuit.
VREF
G = 10
G = 100 +VS
G = 100
G = 10
2
0.1F 6
1/2
7
VOUT
00874-048
C2 0.01F 2% 0V TO 2.5V FULL SCALE
C4 0.01F
10 0%
.... .... .... .... .... .... .... .... .... .... 1V
+
AD822
3 V, SINGLE-SUPPLY STEREO HEADPHONE DRIVER
The AD822 exhibits good current drive and THD + N performance, even at 3 V single supplies. At 1 kHz, total harmonic distortion plus noise (THD + N) equals -62 dB (0.079%) for a 300 mV p-p output signal. This is comparable to other single-supply op amps that consume more power and cannot run on 3 V power supplies.
3V 1F MYLAR CHANNEL 1 47.5k +
that all signals in the audio frequency range (20 Hz to 20 kHz) are delivered to the headphones.
LOW DROPOUT BIPOLAR BRIDGE DRIVER
The AD822 can be used for driving a 350 Wheatstone bridge. Figure 51 shows one-half of the AD822 being used to buffer the AD589, a 1.235 V low power reference. The output of 4.5 V can be used to drive an ADC converter front end. The other half of the AD822 is configured as a unity gain inverter and generates the other bridge input of -4.5 V. Resistor R1 and Resistor R2 provide a constant current for bridge excitation. The AD620 low power instrumentation amplifier is used to condition the differential output voltage of the bridge. The gain of the AD620 is programmed using an external resistor RG and determined by
G= 49.9 k RG +1
+VS
95.3k 3 2
8
0.1F 1 500F
0.1F
+ -
AD822
1/2
4.99k 95.3k L 10k HEADPHONES 32 IMPEDANCE 10k 4.99k 6 1F MYLAR CHANNEL 2 47.5k 5 R
49.9k +1.235V 3
8
AD822
+
4
1/2
7
00874-050
1/2 + AD589 AD822 2 - -
500F
25.4k 1% 10k 1%
+
R1 20
1
TO A/D CONVERTER REFERENCE INPUT
Figure 50. 3 V Single-Supply Stereo Headphone Driver
350 10k 1%
350
RG
10k 1%
-VS
1F
-5V
Figure 51. Low Dropout Bipolar Bridge Driver
Rev. G | Page 23 of 28
00874-051
+
5
-
In Figure 50, each channel's input signal is coupled via a 1 F Mylar capacitor. Resistor dividers set the dc voltage at the noninverting inputs so that the output voltage is midway between the power supplies (1.5 V). The gain is 1.5. Each half of the AD822 can then be used to drive a headphone channel. A 5 Hz high-pass filter is realized by the 500 F capacitors and the headphones that can be modeled as 32 load resistors to ground. This ensures
2
6
AD822
4
1/2
7
-4.5V R2 20
+VS 0.1F
GND + 0.1F -VS
+
-
-
+VS
350
350
3
7 6
AD820
4 5 VREF
-VS
+
+ +
+5V
1F
AD822 OUTLINE DIMENSIONS
0.400 (10.16) 0.365 (9.27) 0.355 (9.02)
8 1 5
4
0.280 (7.11) 0.250 (6.35) 0.240 (6.10)
PIN 1 0.100 (2.54) BSC 0.210 (5.33) MAX 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) 0.060 (1.52) MAX 0.015 (0.38) MIN
0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.195 (4.95) 0.130 (3.30) 0.115 (2.92)
0.015 (0.38) GAUGE PLANE SEATING PLANE 0.430 (10.92) MAX
0.014 (0.36) 0.010 (0.25) 0.008 (0.20)
0.005 (0.13) MIN
COMPLIANT TO JEDEC STANDARDS MS-001-BA CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 52. 8-Lead Plastic Dual In-Line Package [PDIP] Narrow Body (N-8) Dimensions shown in inches and (millimeters)
5.00 (0.1968) 4.80 (0.1890)
8 5 4
3.20 3.00 2.80
4.00 (0.1574) 3.80 (0.1497) 1
6.20 (0.2440) 5.80 (0.2284)
3.20 3.00 2.80
8
5
1
5.15 4.90 4.65
1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040)
1.75 (0.0688) 1.35 (0.0532)
0.50 (0.0196) x 45 0.25 (0.0099)
4
PIN 1 0.65 BSC 0.95 0.85 0.75 0.15 0.00 0.38 0.22 SEATING PLANE
0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE
8 0.25 (0.0098) 0 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067)
1.10 MAX 8 0 0.80 0.60 0.40
COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
0.23 0.08
COPLANARITY 0.10
Figure 53. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches)
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 54. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters
Rev. G | Page 24 of 28
AD822
ORDERING GUIDE
Model AD822AN AD822ANZ1 AD822AR AD822AR-REEL AD822AR-REEL7 AD822ARZ1 AD822ARZ-REEL1 AD822ARZ-REEL71 AD822ARM-R2 AD822ARM-REEL AD822ARMZ-R21 AD822ARMZ-REEL1 AD822BR AD822BR-REEL AD822BR-REEL7 AD822BRZ1 AD822BRZ-REEL1 AD822BRZ-REEL71
1
Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C
Package Description 8-Lead PDIP 8-Lead PDIP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N
Package Option N-8 N-8 R-8 R-8 R-8 R-8 R-8 R-8 RM-8 RM-8 RM-8 RM-8 R-8 R-8 R-8 R-8 R-8 R-8
Branding
B4A B4A #B4A #B4A
Z = Pb-free part, # denotes lead-free product may be top or bottom marked.
SPICE model is available at www.analog.com.
Rev. G | Page 25 of 28
AD822
NOTES
Rev. G | Page 26 of 28
AD822
NOTES
Rev. G | Page 27 of 28
AD822
NOTES
(c)2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C00874-0-6/06(G)
Rev. G | Page 28 of 28

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